Every program eventually becomes a sequence of instructions that the CPU must execute.
A line of C such as:
c = a + b;
looks simple to a programmer.
But the processor does not directly understand C.
After compilation, the program becomes machine instructions such as:
add $t0, $t1, $t2
or the equivalent instruction for another processor architecture.
The CPU must then perform a carefully organized sequence of operations.
At a high level, this process is often described as:
Fetch → Decode → Execute
But a modern CPU usually does more than those three words suggest.
It must fetch the instruction from memory, determine what the instruction means, read the required operands, perform the operation, access memory when necessary, and store the result.
Understanding this cycle is one of the best ways to understand how software becomes real hardware activity.
1. A Program Is a Sequence of Instructions
When a program runs, its machine code is stored in memory.
The CPU sees the program as a sequence of binary instructions.
Conceptually, memory might contain instructions such as:
Instruction 1
Instruction 2
Instruction 3
Instruction 4
Each instruction tells the processor to perform some operation.
Typical operations include:
- adding two values
- subtracting numbers
- loading data from memory
- storing data into memory
- comparing values
- jumping to another instruction
- calling a function
The processor repeatedly retrieves these instructions and executes them.
This repeating process is called the instruction cycle.
2. The Program Counter Tells the CPU Where to Look
The CPU needs to know which instruction should execute next.
For this purpose, processors contain a special register commonly called the Program Counter, or PC.
The Program Counter contains the address of the next instruction.
For example:
PC = 0x1000
means that the next instruction is located at memory address 0x1000.
The processor fetches the instruction stored at that address.
Afterward, the Program Counter normally advances to the next instruction.
Conceptually:
PC → instruction memory → instruction
Without the Program Counter, the CPU would not know where it is inside the running program.
3. Stage One: Fetch the Instruction
The first major step is the fetch stage.
The CPU sends the address stored in the Program Counter to the memory system.
The instruction stored at that address is returned to the processor.
In a simplified system:
Program Counter → Memory → Instruction
For example, suppose the Program Counter contains:
0x1000
and memory location 0x1000 contains an ADD instruction.
The CPU retrieves that instruction.
In modern processors, the instruction will often come from an instruction cache rather than directly from main RAM.
The basic idea, however, remains the same:
The CPU uses an address to retrieve the next instruction.
4. The Instruction Enters the CPU
Once the instruction has been fetched, the CPU must hold it while it determines what the instruction means.
In simple processor diagrams, the instruction may be placed in an Instruction Register.
Modern processors may use more complicated internal structures, but the principle is similar.
The processor now has the binary instruction available internally.
For example, the binary pattern may represent something conceptually equivalent to:
ADD R1, R2, R3
This means:
Take the value from register R2.
Take the value from register R3.
Add them.
Store the result in register R1.
But the CPU still needs circuitry to recognize that meaning.
That happens during decoding.
5. Stage Two: Decode the Instruction
The second major stage is decode.
The instruction contains fields that tell the processor what operation to perform and which operands to use.
Depending on the instruction set, these fields may describe:
- the operation
- source registers
- destination register
- immediate values
- memory addressing information
The operation field is commonly called the opcode.
For an ADD instruction, the opcode tells the CPU that an addition operation is required.
Other opcodes may indicate:
- SUB
- AND
- OR
- LOAD
- STORE
- BRANCH
- JUMP
The decoder examines these bits and determines what hardware must be activated.
6. The Control Unit Coordinates the Operation
The CPU does not simply send the entire instruction directly into the ALU.
Instead, the instruction decoding logic generates control signals.
These signals coordinate different parts of the processor.
The control logic may tell the CPU:
- which registers to read
- which ALU operation to perform
- whether memory should be read
- whether memory should be written
- whether a register should receive a result
- where the next instruction should come from
For example, an ADD instruction might cause signals equivalent to:
Read register R2
Read register R3
Tell the ALU to add
Write the result into R1
The control unit therefore acts like the coordinator of the datapath.
7. The CPU Reads the Source Registers
Many instructions operate on values already stored in registers.
Suppose the processor executes:
ADD R1, R2, R3
The CPU must retrieve the values stored in R2 and R3.
The register file may contain:
R2 = 10
R3 = 20
The register file sends these values toward the execution hardware.
Conceptually:
R2 → ALU input A
R3 → ALU input B
The register names in the instruction identify locations inside the register file.
The actual values stored in those registers become the operands used by the ALU.
8. Stage Three: Execute the Instruction
Now the CPU reaches the execute stage.
For arithmetic and logical instructions, execution usually involves the ALU.
ALU stands for Arithmetic Logic Unit.
The ALU can perform operations such as:
- addition
- subtraction
- AND
- OR
- comparisons
- shifts
For our example:
R2 = 10
R3 = 20
the ALU receives both values.
The control unit tells the ALU to perform addition.
The ALU calculates:
10 + 20 = 30
The result now exists inside the CPU.
But the instruction is not necessarily finished yet.
The result usually needs to be stored somewhere.
9. Not Every Instruction Uses the ALU the Same Way
The execute stage does not always mean simply performing arithmetic.
Different instruction types use the datapath differently.
An arithmetic instruction may use the ALU to calculate:
A + B
A comparison instruction may use it to determine whether:
A < B
A memory instruction may use the ALU to calculate an address.
For example, a load instruction might mean:
Load data from address R2 + 8
The ALU may calculate:
address = R2 + 8
The CPU then uses that address to access memory.
So even instructions that are not obviously arithmetic may still use the ALU.
10. Memory Access for LOAD and STORE Instructions
Arithmetic instructions usually operate on registers.
But programs also need data stored in memory.
This is where LOAD and STORE instructions become important.
A LOAD instruction copies data:
Memory → Register
A STORE instruction copies data:
Register → Memory
For example:
LOAD R1, 8(R2)
might mean:
Calculate the address stored in R2 plus 8.
Read the data stored at that memory address.
Place the data into R1.
The CPU may therefore perform:
Register → ALU → Address → Memory → Register
This is one reason instruction execution involves more than just the ALU.
11. The Write-Back Stage Stores the Result
After the operation is completed, the result often needs to return to the register file.
This stage is commonly called write-back.
For our ADD example:
R2 = 10
R3 = 20
the ALU produces:
30
The CPU writes:
R1 = 30
The complete path now looks approximately like:
Instruction
→ Decode
→ Read R2 and R3
→ ALU
→ Result
→ Write R1
At this point, the ADD instruction is complete.
The value 30 can now be used by future instructions.
12. The Program Counter Moves to the Next Instruction
While all this is happening, the processor must determine what instruction comes next.
Normally, the Program Counter advances sequentially.
If one instruction is located at one address, the next instruction is usually located at the following instruction address.
But this changes when the CPU executes control-flow instructions.
Examples include:
- branches
- jumps
- function calls
- returns
A branch might tell the processor:
If two values are equal, continue execution from another address.
In that case, the Program Counter is changed.
This is how loops, if statements, function calls, and other control structures eventually work at the machine level.
13. Fetch, Decode, Execute Is Really a Larger Cycle
The phrase:
Fetch → Decode → Execute
is useful because it captures the basic idea.
But a more complete simplified instruction cycle often looks like:
Fetch
→ Decode
→ Read Registers
→ Execute
→ Memory Access
→ Write Back
Different instructions may use different parts of this path.
An ADD instruction may not need the memory access stage.
A STORE instruction may not write a result back into a register.
A branch instruction may change the Program Counter instead.
The datapath is shared hardware.
The instruction determines which pieces are needed.
14. One MIPS ADD Instruction Through the Whole CPU
Consider the MIPS-style instruction:
add $t0, $t1, $t2
Its meaning is:
$t0 = $t1 + $t2
Now we can follow the entire process.
First, the Program Counter identifies the instruction address.
The CPU fetches the instruction.
The decoder recognizes it as an ADD instruction.
The instruction identifies $t1 and $t2 as source registers.
The register file reads both values.
The control unit tells the ALU to perform addition.
The ALU adds the two values.
The result travels through the write-back path.
Finally, the result is stored in $t0.
What looks like one short assembly instruction therefore activates several hardware components:
Program Counter
→ Instruction memory
→ Decoder
→ Control logic
→ Register file
→ ALU
→ Write-back path
→ Register file
This is the hardware meaning behind a single line of assembly language.
15. Modern CPUs Execute Instructions Much Faster
The basic instruction cycle is extremely useful for understanding processors.
Real modern CPUs, however, are much more sophisticated.
They do not necessarily wait for one instruction to completely finish before starting the next one.
Modern processors may use:
- pipelining
- multiple execution units
- branch prediction
- caches
- superscalar execution
- out-of-order execution
- register renaming
With pipelining, several instructions can be at different stages of execution at the same time.
For example:
One instruction may be executing.
Another may be decoding.
Another may already be fetching.
The simplified fetch-decode-execute model is therefore not a complete description of a modern high-performance CPU.
But it remains the foundation for understanding what those more advanced techniques are trying to accelerate.
Conclusion
A CPU does not execute a program as one large operation.
It executes instructions.
Each instruction moves through an organized sequence of hardware activity.
The Program Counter identifies the instruction.
The CPU fetches it.
The decoder determines what it means.
The control unit activates the necessary datapath.
Registers provide operands.
The ALU performs arithmetic or logical operations.
Memory may be accessed when necessary.
The result may then be written back into a register.
The cycle continues with the next instruction.
So the familiar phrase:
Fetch → Decode → Execute
represents one of the most fundamental processes inside a computer.
A simple instruction such as:
add $t0, $t1, $t2
may look like a single operation in assembly language.
Inside the processor, however, it becomes a coordinated flow through the Program Counter, instruction memory, decoder, control logic, register file, ALU, and write-back circuitry.
Understanding this instruction cycle creates an important bridge between software and hardware.
The next question naturally becomes:
Where do instructions and data come from, and how does the CPU communicate with memory?
That leads directly to the next topic:
How the CPU Talks to Memory.